Anna University Chennai
B.E./B.Tech.
DEGREE EXAMINATION, MAY/JUNE 2012
Fourth
Semester
Computer
Science and Engineering
CS
2253/141403/CS 43/CS1252 A/10144 CS 404/080250011
COMPUTER
ORGANISATION AND ARCHITECTURE
(Regulation
2008)
PART
A-(10*2 = 20 MARKS)
1. What is SPEC? Specify the formula for SPEC rating.
SPEC is a nonprofit
consortium of 22 major computer vendors whose common goals are
“to
provide the industry with a realistic yardstick to measure the
performance of advanced
computer systems” and to educate consumers
about the performance of vendors’ products. SPEC
creates,
maintains, distributes, and endorses a standardized set of
application-oriented programs
to be used as benchmarks. The formula
for SPEC rating is as follows:
SPEC rating (ratio) =
TR / TC;
where,
TR = Running time of
the Reference Computer;
TC = Running time of
the Computer under test;
If the SPEC rating =
50
means that the computer under test is 50 times as fast as the
ultra sparc 10. This
is repeated for all the programs in the SPEC
suit, and the geometric mean of the result is
computed.
2. What is
relative addressing mode? When is it used?
In relative addressing
mode, we can specify only a constant (offset) for accessing the
address of an operand. The address is calculated by adding the
constant to the current value of the PC. On many machines, the target
address within the machine code for branch instructions is done this
way. The MIPS architecture does this.
3. Write the
register transfer sequence for storing a word in memory.
The procedure of
writing a word into memory location is similar to that for reading
one from memory. The only difference is that the data word to be
written is first loaded into the MDR, the write command is issued.
As an example assumes
that the data word to be stored in the memory is in register R1 and
that the memory address is in register R2. The memory write operation
requires the following sequence:
- MAR <-- [R2]
- MDR <-- [R1]
- Write
- Wait for MFC
4. What is
hard-wired control? How is it different from micro-programmed
control?
A hardwired control
unit has a processor that generates signals or instructions to be
implemented in correct sequence. This was the older method of control
that works through the use of distinct components, drums, a
sequential circuit design, or flip chips. It is implemented using
logic gates & flip flops. It is faster, less flexible &
limited in complexity
A micro programmed control unit on the other hand makes use of a micro sequencer from which instruction bits are decoded to be implemented. It acts as the device supervisor that controls the rest of the subsystems including arithmetic and logic units, registers, instruction registers, off-chip input/output, and buses. It is slower, more flexible & greater complexity
A micro programmed control unit on the other hand makes use of a micro sequencer from which instruction bits are decoded to be implemented. It acts as the device supervisor that controls the rest of the subsystems including arithmetic and logic units, registers, instruction registers, off-chip input/output, and buses. It is slower, more flexible & greater complexity
5. What is meant by data and control hazards in pipelining?
Data hazards are also
known as data dependency. Data dependency is the condition in which the outcome of
the current operation is dependent on the outcome of a previous instruction that has
not yet been executed to completion because of the effect of the pipeline.
Control hazard is
caused by uncertainty of execution path, branch taken or
not taken.
It is a
hazard that arises when an attempt is made to make a decision before condition is
evaluated.
It results when we branch to a new location in the
program, invalidating everything we have
loaded in our pipeline.
6. What is meant by speculative execution?
7. What is meant
by an interleaved memory?
8. An address
space is specified by 24 bits and the corresponding memory space by
16 bits: How mmany words are in the
(a) virtual
memory
(b) main memory
9. Specify the
different I/O transfer mechanisms available.
10. What does
isochronous data stream means?
PART B-(5*16 =
80 marks)
11. (a) (i) What
are addresing modes? Explain the various addressing modes with
examples. (8)
(ii)
Derive and explain an algorithm for adding and substracting 2
floating point binary numbers (8)
Or
(b) (i) Explain
instruction sequencing in detail. (10)
(ii)
Differentiate RISC and CISC architectures. (6)
12. (a) (i) With a
neat diagram explain the internal organisation of a processor. (6)
(ii)
Explain how control signals are generated using microprogrammed
control. (10)
Or
(b) (i)
Explain the use of multiple-bus organisation for executing a
three-operand instruction. (8)
(ii)
Explain the design of hardwired control unit. (8)
13. (a) (i) Discus
the basic concepts of pipelining. (8)
(ii)
Describe the data path and control considerations for pipelining. (8)
Or
(b) Describe
the techniques for handling data and instruction hazards in
pipelining. (16)
14. (a) (i)
Explain synchronous DRAM technology in detail. (8)
(ii) In
a cache-based memory system using FIFO for cache page replacement, it
is found that the cache hit ratio H is low. The following proposals
are made for increasing.
(1) Increase
the cache page size.
(2) Increase
the cache storage capacity.
(3) Increase
the main memory capacity.
(4) Replace the
FIFO replacement policy by LRU.
Analyse each
proposal to determine its probable impact on H. (8)
Or
(b) (i)
Explain the varios mapping techniques associated with cache memories.
(10)
(ii) Explain a method of translating virtual address to physical address. (6)
(ii) Explain a method of translating virtual address to physical address. (6)
15. (a) Explain
the following:
(i) Interrupt
priority schemes. (8)
(ii) DMA. (8)
Or
(b) Write an
elaborated note on PCI, SCSI and USB bus standards. (16)
