Transferring Data using Memory Data Register (MDR)

Fetching and Storing Data using MDR

With few exceptions, an instruction can be executed by performing one or more of the following operations in some specified sequence:

Fetch the contents of a given memory location and load them into a processor register
Transfer a word of data from one processor register to another or to the ALU
Perform an arithmetic or a logic operation and store the result in a processor register
Store a word of data from a processor register into a given memory location

Memory Read and Write Operations using MDR:

During memory Read and Write operations, the timing of internal processor operations must be coordinated with the response of the addressed device on the memory bus.
The processor completes one internal data transfer in one clock cycle.
The speed of operation of the addressed device, on the other hand, varies with the device.
To accommodate the variability in response time, the processor waits until it receives an indication that the requested Read operation has been completed.
We will assume that a control signal called Memory-Function-Completed (MFC) is used for this purpose.
The addressed device set this signal to 1 to indicate that the contents of the specified location have been read and are available on the data lines of the memory bus.

Fig.: Connection and Control Signals for MDR

The connections for register MDR are illustrated in the figure shown above.
It has four controls signals: MDRin and MDRout control the connection to the internal bus, and MDRinE and MDRoutE control the connection to the external bus.

Fetching a Word from Memory

To fetch a word of information from memory, the processor has to specify the address of the memory location where this information is stored and request a Read operation.
This applies whether the information is to be fetched represents an instruction in a program or an operand specified by an instruction.
The processor transfers the required address to the MAR, whose output is connected to the address lines of the memory bus.
At the same time, the processor uses the control lines of the memory bus to indicate that a Read operation is needed.
When the requested data are retrieved from the memory they are stored in register MDR, from where they can be transferred to other registers in the processor.

Example for Reading Data from Memory:

As an example of a read operation, consider the instruction Move (R1), R2. The actions needed to execute this instruction are:

1. MAR ← [R1]
2. Start a Read operation on the memory bus
3. Wait for the MFC response from the memory
4. Load MDR from the memory bus
5. R2 ← [MDR]

These actions may be carried out as separate steps, but some can be combined into a single step.
Each action can be completed in one clock cycle, except action 3 which requires one or more clock cycles, depending on the speed of the addressed device.

Register Transfer

Instruction execution involves a sequence of steps which may involve data transfer from one register to another.
For each register, two control signals are used in order to perform any one of the following operations:

The input and output of register Ri are connected to the bus via switches controlled by the signals RiIn and RiOut, respectively.
When RiIn is set to 1, the data on the bus are loaded into Ri. Similarly, when RiOut is set to 1, the contents of Register Ri are placed on the bus.
While Riout is equal to 0, the bus can be used for transferring data from other registers.
Suppose that we wish to transfer the contents of register R1 to register R4. This can be accomplished as follows:

Enable the output of register R1 by setting R1Out to 1. This places the contents of R1 on the processor bus.
Enable the input of register R4 by setting R4In to 1. This loads data from the processor bus into register R4.

Storing a Word in Memory:

Writing a word into a memory location follows a similar procedure.
The desired address is loaded into MAR. Then, the data to be written are loaded into MDR, and a Write command is issued.
The executing of instruction Move R2, (R1) requires the following sequence:

As in the case of the read operation, the Write control signal causes the memory bus interface hardware to issue a Write command on the memory bus.
The processor remains in step 3 until the memory operation is completed and an MFC response is received